1. Field of the Invention
This invention relates to a timing circuit for timing a delay between events. The invention is suited to the analysis of arrival times between pairs of events, and the analysis and storage of continuous data streams. The invention is particularly suited to photon correlation spectroscopy measurements,
2. Related Art
Analysis of signals that vary in a characteristic manner may be carried out by various methods including: real-time digital electronic correlation, storage of a signal data stream (with later analysis by hardware/software), single stop techniques, multiple stop techniques, gating circuits and Fourier Transform of the signal.
A simple method of analysing a photon stream uses coincidence detection, where two detectors are arranged to detect photons arriving at a predetermined fixed delay (Oliver C. J., 1973, Correlation Techniques, Photon Correlation and Light Beating Spectroscopy, pages 41-74, Ed. Cummins H. Z., Pike E. R., Plenium Press NY, ISBN 0-306-35703-8). This technique allows detection of photons with a bandwidth of the order of 1 GHz (Moreno, F., Gonzalez F., Lopez R. J., Lavin A., 1988, Time-interval statistics through a Lapace transform method in quasi-elastic light-scattering experiments for low-intensity levels, Opt. Soc. Am. Vol. 13, pages 637-639). The delay between detectors and the intensity of a source of the photons must be adjusted such that there is a negligible probability of two photons arriving with a separation less than the delay time between the detectors This method effectively gives a photon correlation value for a single delay time, and requires experiments of long duration. Some improvement in operational speed may be gained by using multiple channels to measure a time interval between pairs of photons, although this will lead to distortion of the correlation.
The distortion introduced by multi-channel single stop measurements can be reduced by using multi-stop techniques, whereby a number of concurrent photons may be detected. Data collection is most effective when a period of recording is initiated by an incident photon Distortion of data is only eliminated when Gaussian sources of light are used.
Multi-stop apparatus conventionally includes time-to-amplitude converters and pulse storage devices which provide very high speed responses but are expensive. Attempts have been made to substitute these components with standard microprocessors. A multi-stop apparatus based on a hardwired computer has been produced which allows 3500 consecutive sample periods to be stored prior to analysis, although at a sampling rate limited to 0.1 MHz (Hallet F. R., Gray A. L., Rybakowski A., Hunt J. L., Stevens J. R., 1972, Photon correlation spectroscopy using a digital PDP-9 computer, Canada J. of Phys., Vol. 50 pages 2368-2372). A later version of this apparatus stored only arrival times using an 8085 processor, and was capable of operation at 1 MHz (Subrahnanyam V. R., Devraj B., Chopra S., 1987, Microprocessor based photon correlator for intensity fluctuation studies, J. Phys. E, Sci. Instrum, Vol 20 pages 340-343).
A significant drawback of multi-stop or non-stop timing circuits when used for high resolution analysis is the magnitude of raw data produced. For example, assuming a signal of 104 events per second and a required resolution of 1 ns, the mean number of clock pulses between events will be 105. Even where events spaced by more than 2000 ns are ignored, the rate of clock cycles per second is 20xc3x97106. In many applications, experimental durations range from 30 seconds to a few minutes, and problems are likely to arise due to the magnitude of data to be stored, and the processing power and/or time required to process results. This limitation is avoided by real-time correlation and pulse arrival distribution analysis techniques.
Correlators do not record the time elapsed between each of a sequence of events, but instead provide a record of the distribution of times separating consecutive events. This is done by defining a number of channels for different separation times, then incrementing a counter located at a relevant channel when an event separated by a given time from a previous event is recorded. Since correlators do not store the sequence of events, a significant reduction of the data to be stored is achieved. A drawback of correlators is that later re-analysis and/or further digital signal processing of the sequence of events is not possible since the sequence itself is not stored.
Where the correlation is measuring a signal that gives a reducing gradient with correlator delay time (i.e. an exponential or mixture of exponentials as is often the case in light scattering) it is common to space the correlator channels in a logarithmic or similar fashion (each channel spacing being double the last is often a convenient implementation in electronics). The data points at longer delay times generally exhibit greater relative errors and are given less weighting in the final fit, although all data points are measured with equal resolution prior to being transferred to a channel.
Real-time electronic digital correlators suffer from significant disadvantages. All parts of the circuitry of a correlator must operate at the shortest correlator delay time, since no data compression occurs on the data stream. This generally makes high speed correlation expensive, and practical limitations suggest hardwired electronic correlators operating above 50 MHz are not economically feasible for most applications.
On initialisation the correlator must load a sample of data equivalent to the number of channels prior to reseting the accumulators (effectively discarding this information) to operate with minimum bias/error. This is a limitation on correlator speed (to allow resetting the accumulators during a single sample time), as well as final correlator length and/or minimum experiment duration. Where the accumulator is not reset in a single sample time after prefilling significant errors or bias may be introduce particularly for short experiments and/or correlators with many channels.
A burst correlator is capable of allowing only pulse arrivals within a limited number of delay times to be detected per experiment, the number of delay times being determined by the number of channels available. This simplified arrangement allows fast correlators to be produced which operate at speeds of around 100 MHz. Whilst burst correlators operate almost in real time, an average of many results is required to carry out a reasonably accurate measurement. Burst correlators allow for rapid decays to be measured, although still requiring costly hardware, and their speed of operation is fundamentally limited by the time required for multiplication/addition processes to be performed.
Burst correlators may suffer significantly from the prefill error discussed above. Burst correlation is highly inefficient in terms of data collection as data must be read out and the correlator reset after a number of sample periods equivalent to the number of channels that have been collected.
A correlator based upon parallel processing using standard transputer boards has been developed (Bruge, Biagio, Fomrnili, 1989, New photon correlator design based on transputer array concurrency, Rev Sci Instrum, Vol. 60, No. 11, page 3425), which has similar operating characteristics to specialised hardwired commercial equipment Real-time electronic correlation is however still limited in terms of speed and cost.
It is an object of the present invention to overcome or substantially mitigate the above disadvantages, and thereby provide an apparatus capable of timing intervals between pulses in an efficient mariner.
According to the invention there is provided a timing circuit for recording the duration of intervals between a plurality of events in a data stream, comprising at least two timing channels, each arranged to generate a signal representing time elapsed between events, wherein the rate of change of the signal generated by each timing channel varies with increasing interval duration, and the timing channels are arranged such that each event terminates the operation of one timing channel and initiates operation of another timing channel.
In many instances it will be preferable that the timing circuit is configured such that the rate of increase of the signal changes as a predetermined series, particularly as a substantially geometric series, although other distributions may be beneficial for other applications. The term xe2x80x98substantially geometric seriesxe2x80x99 is intended to include instances where an electronic circuit generates a sequence which is almost geometric. An alternative distribution may be provided via a pre-programmed sequence that is not a single simple mathematical function.
At least one of the timing channels may comprise a source of clock pulses and a counter, the signal comprising the clock pulses which are accumulated by the counter between events.
Preferably, the rate of increase of the accumulated count is determined by an internal counter and a logic circuit, the logic circuit being programmed by the internal counter to cause an increment of the accumulated count when a predetermined number of cycles of a linear clock have occurred.
At least one of the timing channels may be an analogue clock.
The analogue clock preferably comprises a charge component which is charged or discharged between events, the charge component exhibiting an intrinsic non-linear complex impedance.
Preferably, the timing circuit further comprises an analogue to digital converter for converting an analogue signal at the charge component into a digital signal and means for resetting the charge at said charge component upon the arrival of an event.
Preferably, the charge component is an electronic component, which provides an output to a comparator comprising a voltage across or a charge accumulated in the charge component.
Charging or discharging of the charge component may be commenced from a non-zero initial value, the initial value being chosen to provide a required rate of change of charging or discharging.
The complex impedance may be selected by switching between combinations of charge components.
Preferably, the charge component is a substantially capacitive circuit.
Charging or discharging of the charge component may be induced by optical excitation.
The charge component may comprise one or more solid sate optical detectors which provide a nonlinearity function, via overfilling of the one or more detectors.
Preferably, the timing circuit comprises a plurality of timing channels arranged to operate in a predetermined sequence, each event terminating the operation of one channel and initiating the operation of the next channel in the sequence.
Preferably, the circuit is configured such that a detected event will cause the contents of the channel the operation of which is to be is terminated to be transferred to a storage circuit, whilst initiating the generation of a timing signal by the next channel. This arrangement reduces the effect of the xe2x80x98deadtimexe2x80x99 during which a channel is reset.
Storage means may be provided for recording time delays between successive events, the stage means comprising a first store and a second store, data being collected in the first store prior to being transferred to the second store. This arrangement is advantageous when the readout rate of a stored pulse stream is slow compared to the rate of events which are to be recorded, since the contents of a channel may be transferred quickly to the first store, thereby allowing that channel to be reset and restarted quickly. The data may then be transferred to the second store after the channel bas been restarted. The first and second storage means are also useful if further signal processing is required that cannot occur at the rate of events, since data may be held in the first store and then transferred to the second store via any required signal processing apparatus.
The second storage circuit may be a first-in-first-out buffer storage circuit.
The circuit may comprise two detectors for detecting events in the data stream, the detectors being arranged such that an event incident at a fit detector will terminate the operation of a first timing channel and initiate the operation of a second timing channel, and a subsequent event incident at a second detector will terminate the operation of the second timing channel and initiate the operation of the first timing channel or a third timing channel.
The two detectors for detecting events in the data stream, may have different characteristic noise signatures such that cross-correlation of the detectors produces a characteristic noise signature significantly below that of the auto-correlation of either detector.
The two detectors may be based upon different physical detection phenomena, such that any similarity in the characteristic noise signatures of the detectors is minimised. The two detectors preferably comprise a photon multiplier tube and a solid state detector. The solid state detector may for example be an avalanche photodiode or a PIN diode.
Preferably, a temperature of the solid state detector may be modified independently of the temperature of the photon multiplier tube, to modify the characteristic noise signature of the solid state detector, and thereby enhance the difference between the characteristic noise signature of the solid state detector and the characteristic noise signature of the photon multiplier tube.
Preferably, the circuit is provided with means for obtaining a measurement comprising a correlation of an excitation signal distribution with a distribution of detected events induced from a sample by the excitation. The correlation is preferably carried out in real-time. The circuit may also be provided with means for generating pulse arrival distributions, Fourier transforms or providing digital filtering.
Preferably, the events whose separation are measured by the timing circuit are photons which are detected by a suitable detector means. The detected photons may be from a single source or multiple sources.
Where events to be timed are not represented by single bits (1 or 0), the timing circuit may be implemented in conjunction with a comparator, to determine a detected event.
Where events to be timed are not represented by single bits (1 or 0), the timing circuit may be implemented in conjunction with an analogue to digital converter circuit, allowing attributes of an event to be stored in conjunction with the timing of the event (for example, pulse height).
The circuit may be configured to measure the time duration of pulses, an initial portion of a rising edge of a pulse being treated as a first event, and a final portion of a falling edge of the pulse being treated as a second event.
Where the pulse width as opposed to pulse arrival time is required to be measured, the timing circuit may be wired directly to measure pulse width, or in the alternative, the signal may be inverted. Preferably an inversion circuit would be an integral part of the tinning circuit, thereby allowing rapid changeover between measurement of pulse withstand measurement of pulse arrival times
Where information is contained in another characteristic of a pulse such as height, area or gradient, conversion of the characteristic to a pulse width will allow the characteristic to be measured by the timing circuit.
The circuit may be configured to measure the number of events occurring within a specific time rather than the elapsed time between events.
A trigger from an external source may be arranged to initiate operation of the circuit. Alternatively, a trigger from an external source may be arranged to enable, although not initiate, operation of the circuit.
At least one of the ting channels may comprise a linear clock connected via an internal counter to an input of a multiplexer, the multiplexer having outputs connected to a series of accumulators only one of which is incremented as a result of a monitored interval, the interval time required to cause incrementation of a second accumulator of any successive pair of accumulators being greater than the interval required to cause incrementation of the first accumulator of the pair. The internal counter may comprise a cascade of counters.
The circuit may be configured such that an event comprises the accumulation of charge from a detector until the charge is greater than a predetermined level, whereupon the operation of one timing channel is terminated and the operation of another timing channel is initiated. In this arrangement a signal incident on the detector may be analogue or digital.
The timing circuit described may be operated with a resolution of the order of nanoseconds using conventional electronic circuits. It is noted mediums other than electronics, such as light, could be used to produce a faster timing circuit.
It is noted that for correlation of optical signals it would be preferable to use the optical (as opposed to electronic) medium for logical operations. This would remove the need for a detector and allow further integration.
A real-time display may be used to represent an event time separation distribution during measurement of said event time separations.
The initialisation bias common to conventional correlators will at most be limited to the first stored delay (which may be removed when pulse storage occurs) as there is no requirement for prefill, as is the case in correlation.
In some applications, for example pulsed fluorescence detection, a trigger may be linked to a source, which will allow the timing circuit to operate only at specific selected times in relation to the configuration of a fluorescence source.
In some applications it may be preferable to initiate operation of the timing circuit using a signal which is different to that which is to be counted.
A pre-set delay or until a separate external retrigger may be used to delay a reset of the timing circuit after the storage means is filled.
It is noted that the timing circuit could be adapted (or fitted with a suitable multiplexer) to allow non-linear counting of the number of events occurring within a fixed time period.
There are two distinct implementations of the invention, that where a data stream representing the separation of a series of events is measured and is stored, and that where the pulse arrival distribution is stored (i.e. equivilent to a correlator). In the latter case the actual timing may be done in a linear manner by a counter and converted to a non-linear form by only storing the most significant bit of the number representing the arrival time of the pulse.
The counter may be a single electronic counting device or a cascade of counting devices.
The invention may be implemented entirely or partially as a computer program, such that a computer is configured to carry out the invention. A program of this type may be implemented as software or hardware. Where at least part of the invention is implemented in hardware, this may include an optical component.